The integration of graphene technologies and CMOS technology
Simulation environment for hybrid graphene-silicon CMOS integrated circuits
During the last decade a great variety of devices based on graphene have been experimentally demonstrated; notably, p-n junctions, varactors, transistors, and barristors. By combining these devices with passive components, innumerable circuits could be designed for digital, analog and radio frequency (RF) applications, preferably in the form of an integrated circuit (IC). It is hoped that such circuits can be integrated into the silicon platform with the aim of increasing IC functionality, thus exploiting the unique properties of graphene.
In order to create such hybrid ICs that combine silicon technology with graphene technology, a simulation environment is required that allows calculating the electrical behavior of the circuits (including DC, AC response, transient analysis, and noise analysis) with a result consistent with experimental measurements. The availability of such an environment is a precondition of the manufacturing process. Given that such an environment already exists for silicon, our proposal is to take advantage of this advance and add the ability to simulate the circuits made on the graphene platform, including the hybrid simulation of the circuits on both platforms.
The state of the art in compact models oriented to technology based on graphene considers the main physical effects. For the simulations to be realistic, various non-idealities must also be considered, such as the effects caused by the extrinsic network of the device, the effect of the charges trapped in the dielectric materials and in the interface with the graphene, the effect of self-heating, short channel effects, inertial effects of carriers, and the effect of low and high frequency noise (see Figure 1).
The project is led by the UAB (experts in compact models of graphene devices), and has the collaboration of ICN2 (with extensive experience in the manufacture of graphene devices and circuits) and Keysight Technologies (a company recognized worldwide for offering simulation environments in various technologies).
Fig. 1: The realization of a technology for simulating hybrid graphene-silicon circuits requires the development of compact models that capture the relevant physical effects for each type of circuit analysis: DC, transient, frequency response, noise. Acronyms used – SHE: self-heating, QS: quasi-static, NQS: non quasi-static, MF: medium frequency, HF: high frequency, LFN: low frequency noise, HFN: high frequency noise.
David Jiménez, Doctor in Electronic Engineering and Professor of Universidad laboral in the Department of Electronic Engineering. He has been visiting professor at various universities such as UAM, URV, Tokyo Institute of Technology, UGR, EPFL, and centers like the National Institute of Advance Science and Technology (AIST). His research activity focuses on the modeling of transistors at the nanoscale, including multi-gate MOSFETs, nanowire transistors, and carbon nanotube transistors. He has been involved in the research of new transistor architectures for low-power applications based on ferroelectric materials with negative capacitance, and in the development of non-volatile memories based on the phenomenon of resistive switching. Recently, within the Graphene Flagship Project, his main interest is in transistors and RF circuits based on 2D materials oriented to radio-frequency applications.
Contributions from partners
Universitat Autònoma de Barcelona (UAB)
The UAB has a long history in the development of compact models of electronic devices based on low-dimensional materials (silicon nanowires, carbon nanotubes, graphene, TMDs). In this project they will develop the models of graphene transistors for integrated circuits hybrids and monolithics.
Catalan Institute of Nanoscience and Nanotechnology (ICN2)
Jose A. Garrido
The biomedical applications group, led by Prof. Jose Garrido, brings experience in the manufacture of devices and circuits based on 2D materials. Having measurements of devices and graphene circuits is crucial to test the models of the devices made by the UAB and make possible their calibration.
Keysight Technologies is the owner of Advanced Design System (ADS), which provides a simulation environment for microwave circuits on well-established technologies. Its role in the consortium will be to incorporate the technology developed by the UAB-ICN2 into the ADS software, thus expanding its simulation potential to the design of graphene-based microwave circuits. Additionally, it will play a relevant role in the validation of the expected TRL 6. for this technology by making a set of relevant test circuits available to the project.